Field of the Invention
The present invention relates to an image sensor, and an image capturing apparatus and cellular phone that use the image sensor.
Description of the Related Art
Conventionally, a CMOS image sensor has been widely adopted for an image capturing apparatus such as a digital camera and digital video camera. The image sensor includes a pixel area, and its peripheral circuits for outputting, amplifying, and reading out signals from the pixel area.
In recent years, along with miniaturization of pixels, it has been considered how to ensure the area of a photodiode. By reducing the number of elements constituting each pixel, it is possible to ensure the area of a photodiode, and also ensure a large number of pixels and image quality.
On the other hand, if only the number of pixels is increased, the readout speed decreases. Therefore, to implement a high-speed readout operation, for example, a plurality of horizontal output lines and a plurality of output amplifiers are prepared to provide multiple output channels. Furthermore, a so-called column A/D type image sensor (see, for example, Japanese Patent Laid-Open No. 05-048460) that integrates an A/D conversion function for each column is introduced to increase the speed of a system including A/D conversion.
Some column A/D type image sensors are formed by a so-called stacked structure in which A/D conversion units for respective columns are formed in two chips and these chips are connected as described in, for example, Japanese Patent Laid-Open No. 2011-159958.
If A/D converters are added as peripheral circuits as described in Japanese Patent Laid-Open No. 05-048460, however, the area of the peripheral circuits unwantedly becomes relatively large as the functions of the peripheral circuits increase.
For example, if the area occupied by the image sensor is predetermined like the 35-mm full size format for a single-lens reflex digital camera, as the peripheral circuit area increases, the chip size simply increases. A package to store the chip also becomes large, as a matter of course.
Especially when incorporating an image sensor in a single-lens reflex camera, if the size in the vertical direction of the image sensor (the size in the vertical direction of the camera) increases, the image sensor interferes with the light path of the optical viewfinder of the single-lens reflex camera. If an attempt is made to move the light path upward to prevent such interference, it becomes necessary to largely change a viewfinder optical system. This requires the conventional mechanical structure of the single-lens reflex camera to be largely modified, and thus the load of mechanical design increases. Even if modification is implemented, a large viewfinder prism and the like become necessary, thereby increasing the cost of the mechanical structural parts and optical parts.
On the other hand, even if the stacked structure is adopted as described in Japanese Patent Laid-Open No. 2011-159958, the projection area can be reduced as compared with a case in which the image sensor is formed by a single chip but the readout time will never be shorten by adopting the stacked structure.
In Japanese Patent Laid-Open No. 2011-159958, since an image processing block is mounted, the second chip can be effectively used. In fact, however, in a single-lens reflex digital camera using a large-capacity memory, it is necessary to arrange a memory chip near the image processing block, and thus it is not always desirable to arrange the image processing block on the second chip. If the image signal processing block is not arranged on the second chip, the number of circuits actually arranged on the second chip is very small with respect to the chip area, resulting in a very expensive stacked chip.